Semiconductors: ASML Prepares High-NA EUV for Large Data Center Chips

The project focuses on using larger masks, essential to overcome a current limitation of the new High-NA generation. According to ASML, its standard EUV systems can currently print chips up to about 800 mm², a size already utilized by designers like Nvidia or Google for their largest processors.

High-NA EUV machines enable finer pattern engraving, but their current architecture reduces the printable area in a single exposure. ASML and Intel Foundry have indicated they are working both on a technique called “stitching,” which assembles multiple exposure fields, and on evolving toward larger-format masks.

Intel already uses High-NA systems in its production. TSMC plans to introduce this technology into high-volume advanced manufacturing starting in 2030, while Samsung and SK Hynix target DRAM memory applications from 2028, according to company timelines.

ASML plans to demonstrate a pilot line using enlarged masks in 2031, before availability for high-volume production in 2033. Its CTO, Marco Pieters, estimates this evolution could increase productivity of the affected systems by 40% if the industry manages to harmonize the new standards.

A Technical Bottleneck for AI Chips

The issue of size becomes central as AI accelerators and data center processors integrate more transistors and functions. ASML explains that moving to larger masks should allow manufacturers to benefit from High-NA engraving precision without sacrificing the area needed for the largest components.

This development comes as investments in computing infrastructure continue to grow. Bénin Web TV has notably followed the investments of BlackRock and Nvidia in data centers, another link in the chain fueling demand for ever more powerful chips.

Intel and ASML Aim to Prepare the Ecosystem

In a statement released on 8 September, Intel Foundry and ASML specified that they are working with mask manufacturers, automation suppliers, electronic design software publishers, and material producers to build the standards necessary for this transition.

The two groups present “stitching” as a solution usable with current six-inch masks, while the larger format is expected to offer a simpler path in the long term for very large chips. The work is being presented this week at the SPIE Photomask Technology + Extreme Ultraviolet Lithography conference in the United States.